But I have to say; a press release coming in from over there today has me scratching my head, asking "say wha'?" Here are the first three paragraphs:
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Albany, NY (August 30, 2010) – In another step towards driving the maturity of 3D IC integration, SEMATECH’s 3D Interconnect program announced today the completion of its 300mm 3D IC pilot line, operating at the College of Nanoscale Science and Engineering’s (CNSE) Albany NanoTech Complex. Dedicated to via-mid 3D applications, SEMATECH’s development and exploratory platform includes all processes and test vehicles necessary to demonstrate the viability of the via-mid technology in conjunction with advanced CMOS.
“Our mission is to make 3D through-silicon via (TSV) both manufacturable and affordable. We will prove its very real advantages over conventional, two-dimensional designs — especially in increased functionality and performance,” said Sitaram Arkalgud director of 3D Interconnect at SEMATECH. “The completion of our 300mm R&D line is a significant step towards demonstrating technology solutions for TSV high-volume manufacturing.”Centered on 5um by 50 micron TSVs, the processes include TSV formation and metallization, wafer and die alignment, bonding, thinning, and the necessary metrology for these integration sequences. Supported by the conventional CMOS processing capabilities of CNSE, SEMATECH researchers are working jointly with chipmakers, equipment and materials suppliers, and universities on device interactions for fabrication at the 65nm node for planar and future scaling to 30nm for planar and non-planar CMOS technologies.
etc.
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Nothing, like following that Journalism/PR 101 rule of always put it into language that a sixth grader can understand, right?
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